Flip Flops Question & Answers May 18, 2021 By WatElectronics This article lists 100 Flip Flop MCQs for engineering students. All the Flip Flop Questions & Answers given below includes solution and link wherever possible to the relevant topic. In a sequential circuit design, flip-flops are the basic building blocks. In a short or in a very simple way we can say that flip flop is on and off. The sequential circuit is generally a combinational circuit with memory. The flip flop stores only binary data that has two states are logic 1 and logic 0. The set-reset, JK, delay, and trigger or toggle are the most commonly used flip flops. The multiplexer is an example of a combinational circuit and the flip flop is an example of a sequential circuit. The combinational circuit doesn’t have a memory unit whereas the sequential circuit has a memory unit. The first flip flop was invented by F.W.Jordan and William Eccles. The Delay flip flop converts into other flip flops in three ways they are D to JK, T, and SR flip flop. The type of operation performed by flip flops is synchronous and the type of operation performed by latches is asynchronous. The flip flops require more area and more power compared to latches. The toggle or trigger flip flop convert to other flip flops in three ways they are T to JK, SR, and D flip flop. The flip-flops store only one bit of information. The required flip flop in T to D flip flop conversion is D flip flop, and the required flip flop in JK to D flip flop conversion is D flip flop. 1). The output of the sequential circuit depends upon _________ Present input Past input Present input and present state None of the above Hint 2). The flip flops are categorized into ________ One Two Three Four Hint 3). What is the standard form of S-R flip flop? Set Reset Simple-Reset Single-Reset None of the above Hint 4). When the set is enabled in S-R flip flop then the output will be __________ Set Reset No change Indeterminate Hint 5). When the set is disabled and reset is enabled in S-R flip flop then the output will be __________ Set Reset No change Indeterminate Hint 6). When both set and reset are disabled in S-R flip flop then the output will be __________ Set Reset No change Indeterminate Hint 7). When both set and reset are enabled in S-R flip flop then the output will be __________ Set Reset No change Indeterminate Hint 8). In which flip flop the present input will be the next output? S-R J-K D T Hint 9). The J-K flip flops has ___________ memory Temporary Random Nonrandom True Hint 10). The preset input is used to make output ______ Q=1 Q=0 Invalid No change Hint 11). The clear input is used to make output ______ Q=1 Q=0 Invalid No change Hint 12). The preset and clear inputs don’t need synchronization? True False Hint 13). When preset=0, clear=1 then the output will be ________ One Zero Not used FF operation Hint 14). When preset=1, clear=0 then the output will be ________ One Zero Not used FF operation Hint 15). There are total ______ steps for flip flop conversions One Two Three Five Hint 16). In SR to JK flip flop conversion which one is an available flip flop? SR JK T Both SR and JK Hint 17). In SR to JK flip flop conversion which one is a required flip flop? SR JK T Both SR and JK Hint 18). The shift registers are categorized into ________ One Two Three Four Hint 19). How many possible conversions are there to convert SR flip flop to other flip flops? One Two Three Four Hint 20). A flip flop is an __________ Edge sensitive device Synchronous device Both a and b None of the above Hint 21). The operation of the flip flop is slow? True False Hint 22). How many types of latches are there? One Two Six Four Hint 23). The flip flop requires _________ More number of gates More power Both a and b None of the above Hint 24). _________ are the applications of flip flop Registers Counters Storage devices All of the above Hint 25). Does the flip flop based on enable function input? True False Hint Flip-Flops Important Questions with Hints 26). The flip flops works with ________ Binary inputs Clock signal Both a and b None of the above Hint 27). The flip flop can’t be used as a register is it true? True False Hint 28). What is the standard form of T flip flop? Trigger Toggle Trigger or toggled None of the above Hint 29). The JK flip flop convert to other flip flops in ________? One-way Two ways Three ways Four ways Hint 30). How many types of triggers are there? One type Two types Three types Four types Hint 31). When S=0, R=0, CLK=X then the output will be ___________ No change Set Reset Invalid Hint 32). When reset is low and set is high in a NOR D-latch table then the output will be __________ No change High Low Invalid Hint 33). When reset is high and set is low in a NOR D-latch table then the output will be __________ No change High Low Invalid Hint 34). When reset is high and set is low in a NAND D-latch table then the output will be __________ No change High Low Invalid Hint 35). When reset is low and set is high in a NAND D-latch table then the output will be __________ No change High Low Invalid Hint 36). Which circuit doesn’t have a memory unit? Combinational Sequential Both a and b None of the above Hint 37). ________ is an example for sequential circuit Flip flop Full adder Half adder None of the above Hint 38). _______ is an example for combinational circuit Flip flop Register Multiplexer None of the above Hint 39). How many possible conversions are there to convert T flip flop to other flip flops? One way Two ways Three ways Four ways Hint 40). What is the standard form of D flip flop? Data Deterministic Delay None of the above Hint 41). How many inputs does the RS latch have? One input Two inputs Three inputs Four inputs Hint 42). When triggers on high clock level then this type of trigger is known as ________ High level Low level Positive level Negative level Hint 43). When triggers on low clock level then this type of trigger is known as ________ High level Low level Positive level Negative level Hint 44). The flip flops require ________ More power More area Less power Both a and b Hint 45). The type of operation performed by flip flop is _______ Synchronous Asynchronous Both a and b None of the above Hint 46). The type of operation performed by latches is _______ Synchronous Asynchronous Both a and b None of the above Hint 47). The flip flop is a _______ device Unstable Bi-stable Both a and b None of the above Hint 48). In which year the first flip flop was invented? 1915 1916 1917 1918 Hint 49). How many possible conversions are there to convert D flip flop to other flip flops? One-way Two ways Three ways Four ways Hint 50). Who invented first flip flop? F.W.Jordan William Eccles Harald Both a and b Hint Read more about Flipflops Flip-Flops Important Questions for Engineering Students 51). The set-reset flip flops constructed by cross-coupling of ______ gates AND or NAND NAND or NOR XNOR or NOR None of the above Hint 52). The sequential circuits are categorized into _______ One Two Three Four Hint 53). How many inverters does the basic latch consists of? One Two Three Four Hint 54). How many additional AND gates does SR flip flop consists of? One Two Three Four Hint 55). The J-K flip flop characteristic similar to _________ flip flop D flip flop T flip flop S-R flip flop None of the above Hint 56). The latch is a __________ device Unstable Bistable Both a and b None of the above Hint 57). When toggle condition occurs in JK flip flop? J=1, K=1 J=0, K=0 J=1, K=0 J=0, K=1 Hint 58). The no-change conditions occur when ________ in JK flip flop J=1, K=1 J=0, K=0 J=1, K=0 J=0, K=1 Hint 59). The flip flop are categorized into _______ types One Two Three Four Hint 60). How many outputs does D-flip flop have? One Two Three Four Hint 61). When the clock input is low in a D flip flop then the input of the D flip flop is _______ High Low No effect None of the above Hint 62). When the clock input is high and D input is high then the output of a D flip flop will be _______ High Low No effect None of the above Hint 63). The combinational circuit have ____________ number of stable states One Two Three Four Hint 64). How many inputs does D flip flop have? One Two Three Four Hint 65). The flip flops are activated by _____________ trigger Only positive edge Only negative edge Either positive or negative edge None of the above Hint 66). The RS flip flop input clock is given to _______ Output Input Both a and b Pulse Hint 67). How many NAND gates does the D flip flop circuit consists of? One Two Three Four Hint 68). The inputs of the SR, JK, and D flip flop are the _____ inputs Bidirectional Unidirectional Synchronous Asynchronous Hint Read more about Gates 69). The counters are categorized into ______ One Two Three Four Hint 70). How many states does the decimal counter have? One Ten Three Four Hint 71). The synchronous counter is one type of _______ counter SSI LSI VLSI MSI Hint 72). The BCD is one type of counter which is also known as __________ Synchronous Asynchronous Parallel Decade Hint 73). The counter circuit parallel outputs represent _________ Clock count Serial data word Parallel data word None of the above Hint 74). How many of states are there in a 4 bit counter? One Four Eight Sixteen Hint 75). An IC 7493 is a______ bit binary ripple counter One Four Eight Sixteen Hint Flip-Flops Important Questions for Interviews 76). How many JK master-slave flip flops are required for IC 7493? One Four Eight Sixteen Hint 77). Which IC is a decade counter? IC 7490 IC 7491 IC 7492 IC 7493 Hint 78). How many pins does ripple counter IC have? 4 8 12 14 Hint Read more about Counters 79). __________ type of counter counts in an upward manner Up counter Down counter Decade counter None of the above Hint 80). In which manner does down counter count? Upward Downward Both a and b None of the above Hint 81). The high-speed counter is a __________ type of counter Decade counter Synchronous counter Asynchronous counter None of the above Hint 82). The another name for fundamental mode is ____________ Clock Edge Pulse None of the above Hint 83). Is it true that the up-down counter is a combination of latches and flip-flops? True False Hint 84). How many of states are there in a 3 bit counter? One Four Eight Sixteen Hint 85). Which one is also called as a multimode counter? Decade counter Synchronous counter Asynchronous counter Up and down counter Hint 86). __________ is a truncated modulus example Modulus-9 Modulus-15 Modulus-11 All of the above Hint 87). Is register is a type of combinational circuit? True False Hint 88). What is the standard form of SISO? Serial Input Serial Output Serial Output Serial Input Simple Input Serial Output None of the above Hint 89).What is the standard form of PIPO? Parallel Input Parallel Output Parallel Output Serial Input Simple Input Serial Output None of the above Hint 90). The Johnson and ring shift counters are _________ type of counters Binary Synchronous Asynchronous None of the above Hint 91). Does an IC 74HC195 use for all SISO, PIPO, SIPO, and PISO operations? True False Hint 92). How many bits of information do flip-flop store? One-bit Ten-bit Two-bit Three-bit Hint 93). The very large scale integration chip is made up of _______ BICMOS, CMOS BJT, NMOS Both a and b None of the above Hint 94). How many of states are there in a 2 bit counter? One Four Eight Sixteen Hint 95). What is the standard form of SOSI? Serial Input Serial Output Serial Output Serial Input Simple Input Serial Output None of the above Hint 96).What is the standard form of POSI? Serial Input Serial Output Parallel Output Serial Input Simple Input Serial Output None of the above Hint 97). Read-only memory consists of _______ arrays OR array NAND array Both a and b None of the above Hint 98). What is the available flip flop in T to D flip flop conversion? D flip flop T flip flop S-R flip flop None of the above Hint 99). What is the required flip flop in T to D flip flop conversion? D flip flop T flip flop S-R flip flop None of the above Hint 100). What is the required flip flop in JK to D flip flop conversion? D flip flop T flip flop S-R flip flop None of the above Hint Time is Up! Time's up
